How We Manage the Altium Layers
When layer information is extracted from the Altium Layer Stack Manager, each Altium layer has conductor information such as its material and its type (IE signal or plane). In addition, Altium layers holds information about the dielectric immediately below it, IE whether it is a Core or a Prepreg. The bottom layer does not have a dielectric.
The Altium layer information does not provide enough information to model a PCB. For all of our Altium products, we interprets the Altium layer information and arranged the layers into layer pairs based on the layer stack style assigned in the Layer Stack Manager.
If the PCB is assigned as Internal Layer Pairs stack up, the top layer is assigned as Prepreg with conductors on the top, the next layer is a core with conductors and the top and the bottom. This continues until the bottom layer, where a Prepreg is added with the bottom layer conductors placed on the bottom side if the Prepreg.
If the PCB is assigned as Layer Pairs stack up, the top layer is assigned as a Core with copper on the top and bottom, the next layer is a Prepreg with no conductors followed a core with copper on the top and bottom conductors. This continues until the bottom layer - this is a Core with conductors on the top and the bottom.
For Custom stack up, if the dielectric is not assigned for the layers, the program will attempt the create a suitable stack up based on the number of layers and other factors. If the dielectrics are assigned, the program will adhere to these provided it can an create appropriate set of layer pairs.
Build Up style layer stack up is not yet supported.
The board thickness is calculated from the stack up.
Altium Layer Stacks for Rigid/Flex PCB’s
Rigid/Flex PCB's typically use the Custom stack up option in the Altium Layer Stack Manager.
Currently, the Altium Modeler for SOLIDWORKS can only manage one Flex stack in a design.
When the program builds layer stacks for each PCB in the Rigid/Flex PCB, it starts with the Flex stack. When creating the Rigid stacks, it adds layer pairs to the top and bottom of the common flex layers as appropriate.
When creating a multi-layer PCB in SOLIDWORKS, the program needs to know which dielectric a conductor layer is associated with, so that it can select the correct face of the base extrudes to create the boss extrudes
With the Custom stack up, there is no means of assigning which dielectric a conductor layer is associated with, so the program deduces this.
Below are some guidelines for assigning the Material for a Layer:
Prepreg at the top of the stack have conductors assigned to the upper surface and at the bottom of the stack conductors can be assigned to the bottom of the stack Cores can have conductors on both the upper and lower surfaces When the Material is assigned as None, the program will attempt to work out if conductors above or below are assigned and any that are not will be assign to this dielectric In Flex stacks, if a Prepreg has unassigned conductors above, that will be assigned to the Prepreg.
Taking into account the above guidelines, assigning layers as either a core or a prepreg to achieve the required stack up will ensure the conductors get assigned to the required dielectrics in the 3D assembly.
How and Why Klipper Supports Regions with Holes
Klipper graphics created using fills or traces have had the limitation that they looked fine in the PCB editor but did not work well in fabrication and SolidWorks could not extrude them.
For a long time we have been interested in using Regions for Klipper graphics to solve this. We have offered the ability to create a graphic using regions, but it has been limited to simple shapes. In doing the development work for this, we could see that Regions had the infrastructure to add holes to them, but in Altium there was no means for the user to add a hole to a region (and perhaps no reason to) so we did not take it any further.
Things changed when we did some work on our IDF tools to support keep-outs containing voids. This required a function to look at a group of shapes and decide which ones were enclosed in others. At some time later we realised that we could use this same routine to analyse a graphic and determine which shapes contained holes. This allowed us to fully use regions to create logos.
The result was a great looking logo but, due to the fact that these were created from bitmaps, the outlines made up of huge numbers of lines due to the pixelization.
To resolve this, we implemented a smoothing algorithm and also added a routine that looked at line gradients and joined lines that had the same gradient (ie recognising long straight lines). This resulted in huge reductions in the number of lines making the use of Regions with holes being practical.