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If you also have the IDF Modeler for Altium Designer, we provide additional capabilities not available with standard IDF

These allow you to model the follow elements in 3D:

  • Pads and Vias
  • Traces
  • Polygons
  • Silk screen
  • Solder Mask

Also, your step models embedded in the Altium footprint can be converted to Parts

When Altium introduced support for true type fonts, we faced many dilemmas when we investigated how we would support them in our 3D tools. The Altium SDK provides a function that returns shapes made up lines forming the text. “Problem solved” we thought, but when we implemented this, the lines were sometimes very short, to point that they were sometimes the same length as our shape closing tolerance. Also, the shape of the outline for True Type text we get from Altium is not very smooth (see the screen shot of the tail of a lower-case t), so we could not apply any of our smoothing routines.


The result was a shape that was exactly the same as you see in Altium, but it was made up of thousands of lines and we could not guarantee it would extrude.
We decided we needed a more practical alternative. We opted to use Sketch Text. That is, rather than place shapes into the sketch, we place a text element. This proved to be a reasonable solution as the text would always extrude and the sketch drawing time is reasonable.

The compromise was that we could not exactly match the text size.

We developed some routines that use the windows Text Metric structure to match the Altium font size to the SolidWorks font size. This was not perfect, but a reasonable comprise.

We always wanted this make this better, but could not see the solution. At some point, we became aware of a number of not very well-known windows api functions that allow you to get the shape of text (provided mainly for printer driver developers). Some more digging threw up some Delphi open source libraries that allows these windows api functions to be easily called from our Delphi code.

With appropriate scaling, we could get a perfectly smooth shape for the text, allowing us to apply our smoothing routines.

A day of programming and testing resulted in the Optimise True Type Fonts option in both our Altium Modeler for SolidWorks and the IDF Modeler for SolidWorks.

This option creates shapes that should always extrude and use 60% fewer lines.

Klipper graphics created using fills or traces have had the limitation that they looked fine in the PCB editor but did not work well in fabrication and SolidWorks could not extrude them.

For a long time we have been interested in using Regions for Klipper graphics to solve this. We have offered the ability to create a graphic using regions, but it has been limited to simple shapes. In doing the development work for this, we could see that Regions had the infrastructure to add holes to them, but in Altium there was no means for the user to add a hole to a region (and perhaps no reason to) so we did not take it any further.

Things changed when we did some work on our IDF tools to support keep-outs containing voids. This required a function to look at a group of shapes and decide which ones were enclosed in others. At some time later we realised that we could use this same routine to analyse a graphic and determine which shapes contained holes. This allowed us to fully use regions to create logos.

The result was a great looking logo but, due to the fact that these were created from bitmaps, the outlines made up of huge numbers of lines due to the pixelization.

To resolve this, we implemented a smoothing algorithm and also added a routine that looked at line gradients and joined lines that had the same gradient (ie recognising long straight lines). This resulted in huge reductions in the number of lines making the use of Regions with holes being practical.

Rigid/Flex PCB’s typically use the Custom stack up option in the Altium Layer Stack Manager.

Currently, the Altium Modeler for SOLIDWORKS can only manage one Flex stack in a design.

When the program builds layer stacks for each PCB in the Rigid/Flex PCB, it starts with the Flex stack. When creating the Rigid stacks, it adds layer pairs to the top and bottom of the common flex layers as appropriate.

When creating a multi-layer PCB in SOLIDWORKS, the program needs to know which dielectric a conductor layer is associated with, so that it can select the correct face of the base extrudes to create the boss extrudes

With the Custom stack up, there is no means of assigning which dielectric a conductor layer is associated with, so the program deduces this.

Below are some guidelines for assigning the Material for a Layer:

Prepreg at the top of the stack have conductors assigned to the upper surface and at the bottom of the stack conductors can be assigned to the bottom of the stack
Cores can have conductors on both the upper and lower surfaces
When the Material is assigned as None, the program will attempt to work out if conductors above or below are assigned and any that are not will be assign to this dielectric
In Flex stacks, if a Prepreg has unassigned conductors above, that will be assigned to the Prepreg.

Taking into account the above guidelines, assigning layers as either a core or a prepreg to achieve the required stack up will ensure the conductors get assigned to the required dielectrics in the 3D assembly.

When layer information is extracted from the Altium Layer Stack Manager, each Altium layer has conductor information such as its material and its type (IE signal or plane). In addition, Altium layers holds information about the dielectric immediately below it, IE whether it is a Core or a Prepreg. The bottom layer does not have a dielectric.

The Altium layer information does not provide enough information to model a PCB. For all of our Altium products, we interprets the Altium layer information and arranged the layers into layer pairs based on the layer stack style assigned in the Layer Stack Manager.

If the PCB is assigned as Internal Layer Pairs stack up, the top layer is assigned as Prepreg with conductors on the top, the next layer is a core with conductors and the top and the bottom. This continues until the bottom layer, where a Prepreg is added with the bottom layer conductors placed on the bottom side if the Prepreg.

If the PCB is assigned as Layer Pairs stack up, the top layer is assigned as a Core with copper on the top and bottom, the next layer is a Prepreg with no conductors followed a core with copper on the top and bottom conductors. This continues until the bottom layer – this is a Core with conductors on the top and the bottom.

For Custom stack up, if the dielectric is not assigned for the layers, the program will attempt the create a suitable stack up based on the number of layers and other factors. If the dielectrics are assigned, the program will adhere to these provided it can an create appropriate set of layer pairs.

Build Up style layer stack up is not yet supported.

The board thickness is calculated from the stack up.


The PADS ASCII Modeler reads PADS ASCII data, transparently formats it into IDF data and creates a 3D Assembly. This enables you to create a 3D PCB assembly.

It also allows you to create a PADS ASCII file from your assembly. This allows you to start a PCB design in your mechanical design package.

This provides PADS users who do not have the PADS IDF Link with the ability to create 3D Assemblies of their PCB’s.


  • Same ease of use as with the IDF Modeler
  • All IDF Modeler Import features are supported
  • Converts PADS keepouts into IDF Keepouts
  • Includes the ability to model copper pads and traces and Silk Screen in the 3D assembly – this is a feature that is not possible with standard IDF
  • Available for SolidWorks, Inventor and Solid Edge
  • Supports PADS V5, 2005, 2007, 2009 and 9.x ASCII files
Request for DemosPlease include your company details.

Solid Edge
Send us your PADS ASCII files and we will send you an Assembly (Tell us the version of your 3D Tool)

Solid Edge